The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 04, 2011
Filed:
Apr. 21, 2009
Ping-ying Wang, Hsinchu, TW;
Bing-yu Hsieh, Taipei, TW;
Ling-wei KE, Hsinchu Hsien, TW;
Tai Yuan Yu, Taoyuan Hsien, TW;
Ping-Ying Wang, Hsinchu, TW;
Bing-Yu Hsieh, Taipei, TW;
Ling-Wei Ke, Hsinchu Hsien, TW;
Tai Yuan Yu, Taoyuan Hsien, TW;
Mediatek Inc., Hsin-Chu, TW;
Abstract
A phase locked loop (PLL) with a loop bandwidth calibration circuit is provided. The mixed-mode PLL comprises an analog phase correction path, a digital frequency correction path, a calibration current source, and a loop bandwidth calibration circuit. The analog phase correction path comprises a linear phase correction unit (LPCU). The digital frequency correction path comprises a digital integral path circuit. The calibration current source is coupled to the LPCU. The loop bandwidth calibration circuit is coupled to a frequency divider and coupled between the input and output of the PLL. The loop bandwidth calibration circuit operates after the calibration current source injects a calibration current into the LPCU.