The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 04, 2011
Filed:
Jun. 15, 2009
Xinghai Tang, Cedar Park, TX (US);
Hector Sanchez, Cedar Park, TX (US);
Xinghai Tang, Cedar Park, TX (US);
Hector Sanchez, Cedar Park, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A clock receiver () on an integrated circuit () includes a programmable AC voltage divider () for receiving, through an input capacitor (), a clock signal () from a clock generator () off the integrated circuit and for outputting a modified signal that has a reduced voltage swing, an inverter () coupled to the programmable voltage divider, and a common mode setting circuit (), coupled to an input and an output of the inverter. The common mode setting circuit sets and maintains a common mode at the input of the inverter in response to a voltage at the input of the inverter and a voltage at the output of the inverter. The strength of transistors in the common mode tracking circuit tracks the strength of transistors in the inverter such that the common mode at the input to the inverter tracks a trip point of the inverter.