The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 27, 2011

Filed:

Aug. 30, 2006
Applicants:

James Walter Rymarczyk, Austin, TX (US);

Michael Ignatowski, Red Hook, NY (US);

Thomas J. Heller, Jr., Rhinebeck, NY (US);

Inventors:

James Walter Rymarczyk, Austin, TX (US);

Michael Ignatowski, Red Hook, NY (US);

Thomas J. Heller, Jr., Rhinebeck, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/46 (2006.01); G06F 15/00 (2006.01); G06F 15/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

Multiple instruction set architectures are supported in a system that provides a power-efficient and flexible platform for virtual machine environments requiring multiple support for multiple instruction set architectures (ISAs). A processor includes multiple cores having disparate native ISAs and that may be selectively enabled for operation, so that power is conserved when support for a particular ISA is not required of the processor. A hypervisor controls operation of the cores, locates a core and enables it if necessary when a request to instantiate a virtual machine having a specified ISA is received. The ISA may be specified by a particular operating system and/or application program requirements.


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