The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2011

Filed:

Nov. 10, 2006
Applicants:

David R. Resnick, Tucson, AZ (US);

Van L. Snyder, Eau Claire, WI (US);

Michael F. Higgins, Eau Claire, WI (US);

Inventors:

David R. Resnick, Tucson, AZ (US);

Van L. Snyder, Eau Claire, WI (US);

Michael F. Higgins, Eau Claire, WI (US);

Assignee:

Cray Inc., Seattle, WA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory controller and method that provide a read-refresh (also called 'distributed-refresh') mode of operation, in which every row of memory is read within the refresh-rate requirements of the memory parts, with data from different columns within the rows being read on subsequent read-refresh cycles until all rows for each and every column address have been read, scrubbing errors if found, thus providing a scrubbing function that is integrated into the read-refresh operation, rather than being an independent operation. For scrubbing, an atomic read-correct-write operation is scheduled. A variable-priority, variable-timing refresh interval is described. An integrated card self-tester and/or card reciprocal-tester is described. A memory bit-swapping-within-address-range circuit, and a method and apparatus for bit swapping on the fly and testing are described.


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