The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 20, 2011
Filed:
Dec. 18, 2009
James W. Adkisson, Jericho, VT (US);
John J. Ellis-monaghan, Grand Isle, VT (US);
Mark D. Jaffe, Shelburne, VT (US);
Charles F. Musante, South Burlington, VT (US);
Richard J. Rassel, Essex Junction, VT (US);
James W. Adkisson, Jericho, VT (US);
John J. Ellis-Monaghan, Grand Isle, VT (US);
Mark D. Jaffe, Shelburne, VT (US);
Charles F. Musante, South Burlington, VT (US);
Richard J. Rassel, Essex Junction, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A global shutter compatible pixel circuit comprising a reset gate (RG) transistor is provided in which a dynamic voltage is applied to the drain of the reset gate transistor in order to reduce a floating diffusion (FD) leakage therethrough during signal hold time. The drain voltage of the reset gate transistor is held at a lower voltage than a circuit supply voltage to minimize the off-state leakage through the RG transistor, thus reducing the change in the voltage at the floating diffusion during the signal hold time. In addition, a design structure for such a circuit providing a dynamic voltage to the drain of a reset gate of a pixel circuit is also provided.