The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 20, 2011
Filed:
Jul. 12, 2010
Alireza Moini, Balmain, AU;
Kia Silverbrook, Balmain, AU;
Paul Lapstun, Balmain, AU;
Peter Charles Boyd Henderson, Balmain, AU;
Zhenya Alexander Yourlo, Balmain, AU;
Matthew John Underwood, Balmain, AU;
Nicholas Damon Ridley, Balmain, AU;
Alireza Moini, Balmain, AU;
Kia Silverbrook, Balmain, AU;
Paul Lapstun, Balmain, AU;
Peter Charles Boyd Henderson, Balmain, AU;
Zhenya Alexander Yourlo, Balmain, AU;
Matthew John Underwood, Balmain, AU;
Nicholas Damon Ridley, Balmain, AU;
Silverbrook Research Pty Ltd., Balmain, New South Wales, AU;
Abstract
A photodetecting circuit is disclosed. The photodetecting circuit includes a photodetector, a storage node with first and second node terminals, a transfer transistor disposed intermediate the first node terminal of the storage node and the photodetector for electrically connecting the first node terminal and the photodetector upon receiving a transfer signal to a gate of the transfer transistor, a reset transistor disposed intermediate a reset voltage node and the first node terminal of the storage node for electrically connecting the first node terminal to the reset voltage node upon receiving a reset signal to a gate of the reset transistor, and an output circuit for generating an output signal based on a voltage at the first terminal. First the reset signal is applied, followed by the transfer signal. Next, a compensation signal is applied at the second terminal of the storage node. The compensation signal increases the voltage at the first terminal whilst the output circuit generates the output signal. The compensation signal is a logically negated version of the transfer signal.