The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2011

Filed:

May. 06, 2009
Applicants:

Wei LU, Singapore, SG;

Benjamin L. Amey, Allen, TX (US);

Teuta K. Williams, Dallas, TX (US);

Inventors:

Wei Lu, Singapore, SG;

Benjamin L. Amey, Allen, TX (US);

Teuta K. Williams, Dallas, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G05F 3/16 (2006.01); G05F 1/46 (2006.01);
U.S. Cl.
CPC ...
Abstract

An apparatus is provided. The apparatus comprises a reference circuit and a startup circuit. The reference circuit is adapted to provide a startup current, while the startup circuit receives the startup current and outputs an output voltage. The startup circuit includes a current mirror, a first NMOS transistor, a second NMOS transistor, diodes, and a third NMOS transistor, and a control circuit. The first and second NMOS transistors are coupled to the current mirror at their sources and are coupled to one another and to the reference circuit at their gates. The diodes are coupled between the gate of the second NMOS transistor and the source of the second NMOS transistor, and the third NMOS transistor is coupled to the source of the second NMOS transistor at its gate (which also provides the output voltage at its source). The control circuit is then coupled to the drains of the first and second NMOS transistors.


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