The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 20, 2011
Filed:
Apr. 23, 2009
Takashi Yui, Shiga, JP;
Atsushi Saiki, Niigata, JP;
Takashi Yui, Shiga, JP;
Atsushi Saiki, Niigata, JP;
Panasonic Corporation, Osaka, JP;
Abstract
A semiconductor device fabrication method includes: forming an elongated holein a wiring board plate along a perimeter lineof a plurality of wiring board regions defined over the wiring board plate with a connecting portion left unremoved at a corner of each of the wiring board regions; mounting semiconductor elements on the wiring board regions; and cutting the connecting portion using a punchto isolate the wiring board regions from the wiring board plate into wiring boards. Each of the wiring boards has a cut edge formed by the punch, the cut edge starting from an end of the elongated holeprovided on a first side of the perimeter lineand extending across part of the connecting portion inside the perimeter line, the cut edge being angled inward of the wiring board so as to slope downward from the end of the elongated hole