The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2011

Filed:

Oct. 01, 2008
Applicants:

Ping Mei, Palo Alto, CA (US);

Hao Luo, San Jose, CA (US);

Albert Hua Jeans, Mountain View, CA (US);

Angeles Marcia Almanza-workman, Sunnyvale, CA (US);

Robert A. Garcia, Palo Alto, CA (US);

Warren Jackson, San Francisco, CA (US);

Carl P. Taussig, Redwood City, CA (US);

Craig M. Perlov, San Mateo, CA (US);

Inventors:

Ping Mei, Palo Alto, CA (US);

Hao Luo, San Jose, CA (US);

Albert Hua Jeans, Mountain View, CA (US);

Angeles Marcia Almanza-Workman, Sunnyvale, CA (US);

Robert A. Garcia, Palo Alto, CA (US);

Warren Jackson, San Francisco, CA (US);

Carl P. Taussig, Redwood City, CA (US);

Craig M. Perlov, San Mateo, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A fabrication process for a device such as a backplane for a flat panel display includes depositing thin film layers on a substrate, forming a 3D template overlying the thin film layers, and etching the 3D template and the thin film layers to form gate lines and transistors from the thin film layers. An insulating or passivation layer can then be deposited on the gate lines and the transistors, so that column or data lines can be formed on the insulating layer.


Find Patent Forward Citations

Loading…