Parallel analog and digital timers in power controller circuit breaker

Abstract

A circuit breaker for a power controller integrated circuit is described where an analog timer and a digital timer are provided in parallel. The digital timer provides a fixed, on-chip maximum delay during an overcurrent condition to ensure the transistor will not be damaged. The analog timer allows the user to select an external capacitor or resistor to provide a delay time that is shorter than the time provided by the digital timer. Accordingly, the power controller retains all the flexibility of an analog timer but prevents the overcurrent exceeding a maximum time limit. An autoretry circuit is also included in the power controller which prevents the duty cycle from exceeding a maximum. The autoretry timer is a digital timer that uses the same oscillator as the digital timer for the circuit breaker so the ratio of the delay times is known and fixed.