The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 06, 2011
Filed:
Jun. 13, 2008
Thomas B. Chadwick, Jr., Essex Junction, VT (US);
Margaret R. Charlebois, Jericho, VT (US);
David J. Hathaway, Underhill, VT (US);
Jason E. Rotella, Mineville, NY (US);
Douglas W. Stout, Milton, VT (US);
Ivan L. Wemple, Shelburne, VT (US);
Thomas B. Chadwick, Jr., Essex Junction, VT (US);
Margaret R. Charlebois, Jericho, VT (US);
David J. Hathaway, Underhill, VT (US);
Jason E. Rotella, Mineville, NY (US);
Douglas W. Stout, Milton, VT (US);
Ivan L. Wemple, Shelburne, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method, system and computer program product for analyzing and modifying a static timing slack of a timing path in a static timing analysis of a design of an integrated circuit (IC) with a transient power supply are disclosed. A static timing slack analysis is performed at a selected endpoint in an IC to obtain a candidate timing path leading to the endpoint with a worst static timing slack. A transient static timing slack is determined for the candidate timing path for each clock cycle of a clock signal under the transient power supply. The determined transient static timing slack is used to adjust the timing of the IC and to modify the static timing slack of the candidate timing path.