The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 06, 2011
Filed:
Dec. 29, 2010
Charles C. Lee, Cupertino, CA (US);
I-kang Yu, Palo Alto, CA (US);
David Nguyen, San Jose, CA (US);
Abraham Chih-kang MA, Fremont, CA (US);
Ming-shiang Shen, Taipei Hsien, TW;
Charles C. Lee, Cupertino, CA (US);
I-Kang Yu, Palo Alto, CA (US);
David Nguyen, San Jose, CA (US);
Abraham Chih-Kang Ma, Fremont, CA (US);
Ming-Shiang Shen, Taipei Hsien, TW;
Super Talent Electronics, Inc., San Jose, CA (US);
Abstract
Methods and systems of managing memory addresses in a large capacity multi-level cell based flash memory device are described. According to one aspect, a flash memory device comprises a processing unit to manage logical-to-physical address correlation using an indexing scheme. The flash memory is partitioned into N sets. Each set includes a plurality of entries (i.e., blocks). N sets of partial logical entry number to physical block number and associated page usage information (hereinafter 'PLTPPUI') are stored in the reserved area of the MLC based flash memory. Only one the N sets is loaded to address correlation and page usage memory (ACPUM), which is a limited size random access memory (RAM). In one embodiment, static RAM (SRAM) is implemented for fast access time for the address correlation. LSA received together with the data transfer request dictates which one of the N sets of PLTPPUI is loaded into ACPUM.