The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 06, 2011
Filed:
May. 17, 2007
Bill K. C. Kwan, Austin, TX (US);
Craig Eaton, Austin, TX (US);
Daniel W. Bailey, Austin, TX (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A clock generator system () includes a phase locked loop (PLL) (), a first clock generator (), and a second clock generator (). The PLL () includes a first output configured to provide a first clock signal at a first frequency and a second output configured to provide a second clock signal at the first frequency. The second clock signal is out-of-phase with the first clock signal. An output of the first clock generator () is configured to provide a first generated clock signal whose effective frequency is based on both the first and second clock signals and a first mode signal. An output of the second clock generator () is configured to provide a second generated clock signal whose effective frequency is based on both the first and second clock signals and a second mode signal.