The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 06, 2011
Filed:
Sep. 06, 2008
Stacking integrated circuits containing serializer and deserializer blocks using through silicon via
Applicant:
Farhang Yazdani, Bellevue, WA (US);
Inventor:
Farhang Yazdani, Bellevue, WA (US);
Assignee:
Broadpak Corporation, Las Vegas, NV (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/11 (2006.01);
U.S. Cl.
CPC ...
Abstract
Methods and systems for stacking multiple chips with high speed serialiser/deserialiser blocks are presented. These methods make use of Through Silicon Via (TSV) to connect the dice to each other, and to the external pads. The methods enable efficient multilayer stacking that simplifies design and manufacturing, and at the same time, ensure high speed operation of serialiser/deserialiser blocks, using the TSVs.