The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 30, 2011
Filed:
Dec. 11, 2007
Yasuaki Makino, Okazaki, JP;
Hiroshi Okada, Nukata-gun, JP;
Reiji Iwamoto, Nagoya, JP;
Nobukazu Oba, Okazaki, JP;
Shinji Nakatani, Okazaki, JP;
Norikazu Ohta, Aichi-gun, JP;
Hideki Hosokawa, Owariasahi, JP;
Yasuaki Makino, Okazaki, JP;
Hiroshi Okada, Nukata-gun, JP;
Reiji Iwamoto, Nagoya, JP;
Nobukazu Oba, Okazaki, JP;
Shinji Nakatani, Okazaki, JP;
Norikazu Ohta, Aichi-gun, JP;
Hideki Hosokawa, Owariasahi, JP;
DENSO CORPORATION, Kariya, JP;
Abstract
A peak voltage detector circuit detects a peak voltage of an input voltage. The input voltage is input into a first input terminal of a comparator. A counter circuit counts up a counter value in synchronization with a first clock signal, when a signal output from the comparator is in a first state. The counter circuit counts down the counter value in synchronization with a second clock signal. A digital-analog conversion circuit outputs an output voltage corresponding to the counter value, and the output voltage is input into a second input terminal of the comparator. The first clock signal has a wave period shorter than that of the second clock signal.