The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2011

Filed:

Jul. 13, 2009
Applicants:

Shoichi Fukui, Tokyo, JP;

Noboru Morimoto, Tokyo, JP;

Yasutaka Nishioka, Tokyo, JP;

Junko Izumitani, Tokyo, JP;

Atsushi Ishii, Tokyo, JP;

Inventors:

Shoichi Fukui, Tokyo, JP;

Noboru Morimoto, Tokyo, JP;

Yasutaka Nishioka, Tokyo, JP;

Junko Izumitani, Tokyo, JP;

Atsushi Ishii, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

To provide a manufacturing method of a semiconductor device which can improve the reliability of the semiconductor device. A first insulating film for covering a semiconductor element formed in a semiconductor substrate is formed by a thermal CVD method or the like which has a good embedding property. A second insulating film is formed to cover the first insulating film by a plasma CVD method which has excellent humidity resistance. A plug is formed to penetrate the first insulating film and the second insulating film. A third insulating film comprised of a low-k film having a relatively low dielectric constant is formed over the second insulating film. A wiring is formed in the third insulating film by a damascene technique to be electrically coupled to the plug.


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