The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8008659 B1

PDF
Full Text
Expired
Date of Patent:
Aug. 30, 2011

Filed:

Oct. 31, 2005
Applicants:

Yoshifumi Ikenaga, Tokyo, JP;

Koichi Takeda, Tokyo, JP;

Masahiro Nomura, Tokyo, JP;

Inventors:

Yoshifumi Ikenaga, Tokyo, JP;

Koichi Takeda, Tokyo, JP;

Masahiro Nomura, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/58 (2006.01); H01L 29/10 (2006.01); H03K 3/01 (2006.01);
U.S. Cl.
CPC ...
Abstract

A substrate bias is controlled such that a leakage current is minimum. A semiconductor integrated circuit device comprises a leakage detecting circuit which detects a leakage current by using leakage detecting MOSFETs, a control circuit which generates a control signal depending on an output from the leakage detecting circuit, a substrate bias generating circuit which changes a substrate bias depending on the control signal, and a controlled circuit including a MOSFET having the same characteristics as that of each of the leakage detecting MOSFETs. The leakage detecting circuit detects a substrate leakage current which includes as the substrate bias becomes deep and a subthreshold leakage current which decreases as the substrate bias becomes deep. A control signal is transmitted to the substrate bias generating circuit such that the substrate bias is made deep when the substrate leakage current is smaller than the subthreshold leakage current and such that the substrate bias is made shallow when the substrate leakage current is larger than the subthreshold leakage current.


Find Patent Forward Citations

Ikenaga, Yoshifumi. (2011). Semiconductor integrated circuit device (U.S. Patent No. 8008659). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8008659

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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