The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 30, 2011
Filed:
Feb. 12, 2007
Applicants:
Albert Wu, Palo Alto, CA (US);
Roawen Chen, San Jose, CA (US);
Inventors:
Albert Wu, Palo Alto, CA (US);
Roawen Chen, San Jose, CA (US);
Assignee:
Marvell World Trade Ltd., St. Michael, BB;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/84 (2006.01);
U.S. Cl.
CPC ...
Abstract
An integrated circuit includes a bulk technology integrated circuit (bulk IC) including a bulk silicon layer and complementary MOSFET (CMOS) transistors fabricated thereon. The integrated circuit also includes a single transistor dynamic random access memory (1T DRAM) cell arranged adjacent to and integrated with the bulk IC.
Quick Actions:
Wu, Albert. (2011). Method for fabricating 1t-dram on bulk silicon (U.S. Patent No. 8008137). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8008137
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile