The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2011

Filed:

Mar. 26, 2008
Applicants:

Chien-te Feng, Shindian, TW;

Kevin Jin, Hsin Tien, TW;

Inventors:

Chien-Te Feng, Shindian, TW;

Kevin Jin, Hsin Tien, TW;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/50 (2006.01); H01L 21/48 (2006.01); H01L 21/44 (2006.01); H01L 23/495 (2006.01); H01L 23/10 (2006.01); H01L 23/367 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention provides semiconductor chip packages, tools, and methods for preventing and for correcting leadfinger deformation caused during wirebonding in semiconductor chip package manufacturing. Disclosed are improved heat blocks and methods for their use in ensuring adequate clearance between leadfingers and adjacent heat spreaders, as well as semiconductor chip package assemblies wherein a selected clearance between leadfingers and parallel surfaces may be assured. Methods of the invention include steps for supporting the proximal ends of the leadfingers using the wirebonding cavity of a heat block. Thus supported, a plurality of bondwires are attached to couple bond pads of the semiconductor chip to the proximal ends of leadfingers. Thereafter, the clearance between the wirebonded proximal ends of the leadfingers and the adjacent parallel surface of the heat spreader is adjusted using a spacing cavity of the heat block. In preferred embodiments of the invention, a plurality of bondwires couple a plurality of bond pads of the semiconductor chip to the proximal end of a single leadfinger, with assured clearance between the proximal end of the leadfinger and an underlying surface.


Find Patent Forward Citations

Feng, Chien-Te. (2011). Semiconductor chip package assembly method and apparatus for countering leadfinger deformation (U.S. Patent No. 8008131). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8008131

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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