The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 23, 2011

Filed:

Feb. 15, 2008
Applicants:

Christopher J. Berry, Hudson, NY (US);

Jose Luis Pontes Correla Neves, Poughkeepsie, NY (US);

Charlie Chornglii Hwang, Wappingers Falls, NY (US);

David Wade Lewis, Pleasant Valley, NY (US);

Inventors:

Christopher J. Berry, Hudson, NY (US);

Jose Luis Pontes Correla Neves, Poughkeepsie, NY (US);

Charlie Chornglii Hwang, Wappingers Falls, NY (US);

David Wade Lewis, Pleasant Valley, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A design methodology and algorithms for the computer aided design of integrated circuits having clock distribution networks. The clustering of latch distribution tree components is combined with repositioning of such components within clock sector areas. The movement and clustering of components is such that the timing constraints are preserved. The methods is described in terms of reducing and balancing the load inside each clock sector, although the techniques may also be applied to balancing load between clock sectors.


Find Patent Forward Citations

Loading…