The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 23, 2011
Filed:
Jun. 25, 2009
Navin Kumar Ramamoorthy, Bangalore, IN;
Umesh K Shukla, Bangalore, IN;
K. S. Sankara Reddy, Bangalore, IN;
Navin Kumar Ramamoorthy, Bangalore, IN;
Umesh K Shukla, Bangalore, IN;
K. S. Sankara Reddy, Bangalore, IN;
International Business Machines Corporation, Armonk, NY (US);
Abstract
A system and method for minimizing non-linearity errors induced in output drive voltage of a transmitter circuit due to on-chip process, voltage, and temperature (PVT) variations. The system including an oscillator for converting an input reference bias voltage into a clock output signal, where the input reference bias voltage varies in response to PVT variations. Also included is a counter for counting the clock output signal and generating a count value corresponding to the clock output of the oscillator. A comparison module operatively coupled to the counter compares the count value with a pre-simulated count value to generate an error signal. Based on the error signal generated by the comparison module, a correction logic adjusts an output drive signal of the transmitter circuit making it immune to PVT variations.