The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 2011

Filed:

Dec. 05, 2007
Applicants:

Vivek Kashyap, Beaverton, OR (US);

Charles R Lefurgy, Austin, TX (US);

Dipankar Sarma, Bangalore, IN;

Inventors:

Vivek Kashyap, Beaverton, OR (US);

Charles R Lefurgy, Austin, TX (US);

Dipankar Sarma, Bangalore, IN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01);
U.S. Cl.
CPC ...
Abstract

A co-operative mechanism in which a service processor and a host CPU (with an as running thereupon) work together to implement both power capping and utilization-based power savings, and with negligible side effects. Preferably, a 2-level modulation scheme is employed to undertake both power capping and energy savings simultaneously. Preferably, a frequency governor in the as running on a host processor saves power by modulating p-states based on a shared table, thus avoiding SMIs. The range of the p- I states in the shared table is adjusted to implement power capping in conjunction with power sensors in the system. This adjustment can be done either by a service processor, which can monitor total energy consumption, or an as or software running on the host processor, which can read energy consumption from the service processor and adjust the shared table.


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