Wireless modem architecture for reducing memory components

Abstract

A wireless communications device includes a host processing unit, a modem processing unit, and a memory transport interface. The wireless communications device typically runs a variety of software tasks, some of which require considerably more memory than others. By processing the memory intensive tasks with the host processing unit and assigning tasks requiring high computing power but relatively smaller memory to the modem processor unit, a smaller on-chip memory can be used for the modem processor unit tasks. In addition, by using a messaging transport interface to transfer data between tasks running on different processing units, smaller local memories can be used in place of a shared memory. For example, by allocating and storing L1 tasks at the modem processing unit and allocating/storing L2 and L3 tasks at the host processing unit, duplicate memory components may be reduced or removed, thereby lowering system costs and improving system efficiency.