The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 16, 2011
Filed:
Aug. 03, 2010
Taku Ogura, Hyogo, JP;
Tadaaki Yamauchi, Hyogo, JP;
Hidenori Mitani, Hyogo, JP;
Takashi Kubo, Hyogo, JP;
Kengo Aritomi, Hyogo, JP;
Taku Ogura, Hyogo, JP;
Tadaaki Yamauchi, Hyogo, JP;
Hidenori Mitani, Hyogo, JP;
Takashi Kubo, Hyogo, JP;
Kengo Aritomi, Hyogo, JP;
Renesas Electronics Corporation, Kanagawa, JP;
Abstract
A memory array including memory mats is arranged in a U shape when seen in two dimensions, and a logic circuit and an analog circuit are arranged in a region unoccupied by the memory array. This facilitates transmission of power supply voltage and signals between the peripheral circuit including the analog and logic circuits and the pad band including power supply and data pads. The analog circuit is positioned close to the power supply pad, so that voltage drop due to the resistance of power supply interconnection is restricted. It is also possible to separate a charge pumping power supply interconnection and a peripheral circuit power supply interconnection in the vicinity of the power supply pad.