The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 16, 2011
Filed:
Aug. 26, 2008
Kenji Ijitsu, Kawasaki, JP;
Kenji Ijitsu, Kawasaki, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
A timing generating circuit generates a control clock () and a test clock () based on an externally input clock CLK, and outputs the generated clocks to a testing circuit. The control clock () is a signal the phase of which is delayed by a predetermined amount with reference to the clock CLK. This predetermined amount can be set/changed with an external test signal. The test clock () is nearly an inversion signal of the clock CLK. The testing circuit generates various types of control signals () based on either of the clocks () and (), and distributes the signals to a controlling circuit. Which of the clocks () and () is selected in the testing circuit can be set with an external test signal.