The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 2011

Filed:

Sep. 04, 2007
Applicants:

Takeshi Ohkawa, Kanagawa, JP;

Koichi Ono, Kanagawa, JP;

Kouji Matsuura, Chiba, JP;

Yukitosi Yamashita, Nagasaki, JP;

Junji Toyomura, Nagasaki, JP;

Shogo Nakamura, Nagasaki, JP;

Norifumi Kanagawa, Nagasaki, JP;

Inventors:

Takeshi Ohkawa, Kanagawa, JP;

Koichi Ono, Kanagawa, JP;

Kouji Matsuura, Chiba, JP;

Yukitosi Yamashita, Nagasaki, JP;

Junji Toyomura, Nagasaki, JP;

Shogo Nakamura, Nagasaki, JP;

Norifumi Kanagawa, Nagasaki, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/36 (2006.01);
U.S. Cl.
CPC ...
Abstract

A folding circuit and an analog-to-digital converter wherein a response to small signals is improved, a load on a clock signal can be reduced, and the increase of circuit area can be prevented. The circuit includes a reference voltage generating circuit that generates a plurality of differential voltages as reference voltages, and a plurality of amplification circuits that convert differential voltages between the plurality of reference voltages and an analog input voltage to differential currents, and output these differential currents. The output ends of the amplification circuits are alternately connected. Each of the amplification circuit is configured by a differential amplifier circuit having cascode output transistors (). A switch (), which is turned on in synchronization with the control clock, is provided between the both sources of the cascode output transistors ().


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