The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 2011

Filed:

Mar. 26, 2009
Applicants:

Stuart M. Horton, Washington, DC (US);

Xiaochun Zhao, Allen, TX (US);

Inventors:

Stuart M. Horton, Washington, DC (US);

Xiaochun Zhao, Allen, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 5/00 (2006.01); H03K 5/08 (2006.01);
U.S. Cl.
CPC ...
Abstract

An apparatus that is adapted to receive signals from an Inter-Integrated Circuit (IC) bus is provided. The apparatus comprises a serial data (SDA) filter, a serial clock (SCL) filter, IC interface logic, and operational circuitry. The SDA filter is adapted to receive an SDA signal from the IC bus and includes a hold terminal and a disable terminal. The hold terminal of the SDA filter issues a disable signal when a transient in the SDA signal is detected. The SCL filter is adapted to receive an SCL signal from the IC bus and includes a hold terminal and a disable terminal. The hold terminal of the SCL filter issues a disable signal when a transient in the SCL signal is detected. Additionally, the hold terminal of the SCL filter is coupled to the disable terminal of the SDA filter, and the hold terminal of the SDA filter is coupled to the disable terminal of the SCL filter. The IC interface logic is coupled to the SDA filter and to the SCL filter, and operational circuitry is coupled the IC interface logic.


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