The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 16, 2011
Filed:
Aug. 31, 2009
Mingde Pan, Morgan Hill, CA (US);
Shou-po Shih, Cupertino, CA (US);
Mei Luo, San Jose, CA (US);
Weiqi Ding, Fremont, CA (US);
Mingde Pan, Morgan Hill, CA (US);
Shou-Po Shih, Cupertino, CA (US);
Mei Luo, San Jose, CA (US);
Weiqi Ding, Fremont, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
Circuits and a method for tuning an integrated circuit (IC) are disclosed. The IC includes a storage circuit coupled to receive a data signal, a clock input signal and a reset signal. The storage circuit may be used to generate a clock signal. The reset signal is supplied by a reset circuit. The reset circuit may include one or more logic gates to generate the reset signal. The reset circuit receives a phase shifted version of the clock input signal and the reset signal is generated based on the phase shifted version of the clock input signal. In one embodiment, the reset signal is a series of pulses generated at specific intervals to shift the output of the storage circuit from logic high level to logic low level.