The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 2011

Filed:

Jan. 25, 2006
Applicants:

Masahito Kawabata, Kanagawa, JP;

Yoshihito Fujiwara, Kanagawa, JP;

Inventors:

Masahito Kawabata, Kanagawa, JP;

Yoshihito Fujiwara, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

An object of the present invention is to provide a semiconductor device by packaging a plurality of semiconductor chips three-dimensionally in a smaller thickness, with a smaller footprint, at the lower cost without using any other components and through a simpler manufacturing process of the semiconductor device than with the conventional methods. A flip chip packaging structure is formed by directly connecting a first semiconductor chip () reduced in thickness by back grinding and a substrate () via a bump electrode () to a wiring pattern (). Also, a second semiconductor chip () is formed with an electrode () that is higher than the sum of the thickness of the first semiconductor chip () and the height of the electrode (), and the electrode () is directly connected to the wiring pattern () on the substrate (), whereby the most-compact three-dimensional semiconductor packaged device is produced.


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