The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 16, 2011
Filed:
Mar. 27, 2006
Shuichi Kikuch, Gunma, JP;
Shigeaki Okawa, Tochigi, JP;
Kiyofumi Nakaya, Saitama, JP;
Toshiyuki Takahashi, Gunma, JP;
Shuichi Kikuch, Gunma, JP;
Shigeaki Okawa, Tochigi, JP;
Kiyofumi Nakaya, Saitama, JP;
Toshiyuki Takahashi, Gunma, JP;
Sanyo Electric Co., Ltd., Osaka, JP;
Abstract
In a conventional semiconductor device, there has been a problem that, in a region where a wiring layer to which a high electric potential is applied traverses a top surface of an isolation region, the withstand voltage is deteriorated. In a semiconductor device of the present invention, an epitaxial layer is deposited on a substrate, and an LDMOSFET is formed in one region divided by an isolation region. In a region where a wiring layer connected to a drain electrode traverses a top surface of the isolation region, a conductive plate having a ground electric potential and another conductive plate in a floating state are formed under the wiring layer. With this structure, electric field is reduced in the vicinity of the isolation region under the wiring layer, whereby a withstand voltage of the LDMOSFET is increased.