The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 2011

Filed:

Jun. 23, 2010
Applicants:

Hiroyuki Chibahara, Tokyo, JP;

Atsushi Ishii, Tokyo, JP;

Naoki Izumi, Tokyo, JP;

Masahiro Matsumoto, Tokyo, JP;

Inventors:

Hiroyuki Chibahara, Tokyo, JP;

Atsushi Ishii, Tokyo, JP;

Naoki Izumi, Tokyo, JP;

Masahiro Matsumoto, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/46 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device wherein destruction of a sealing ring caused by cracking of an interlayer dielectric film is difficult to occur, as well as a method for manufacturing the semiconductor device, are provided. A first laminate comprises first interlayer dielectric films having a first mechanical strength. A second laminate comprises second interlayer dielectric films having a mechanical strength higher than the first mechanical strength. A first region includes first metallic layers and vias provided within the first laminate. A second region includes second metallic layers and vias provided within the second laminate. When seen in plan, the second region overlaps at least a part of the first region, is not coupled with the first region by vias, and sandwiches the second interlayer dielectric film between it and the first region.


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