The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 09, 2011
Filed:
Nov. 10, 2008
Circuit arrangement and method for checking the function of a logic circuit in a circuit arrangement
Marcus Janke, Munich, DE;
Franz Klug, Munich, DE;
Peter Laackmann, Munich, DE;
Dirk Rabe, Emden, DE;
Stefan Rueping, Lengdorf, DE;
Marcus Janke, Munich, DE;
Franz Klug, Munich, DE;
Peter Laackmann, Munich, DE;
Dirk Rabe, Emden, DE;
Stefan Rueping, Lengdorf, DE;
Infineon Technologies AG, Neubiberg, DE;
Abstract
A circuit arrangement comprising a logic circuit to be tested and a test circuit. The logic circuit comprising logic-circuit-internal combinations configured to generate output data from input data based on a predetermined relationship. The logic circuit is configured to detect whether the relationship is satisfied and to provide an error signal if the relationship is not satisfied. The test circuit is configured to alter logic-circuit-internal combinations, to detect the error signal, and to output an alarm signal if the error signal is not detected upon alteration of the logic-circuit-internal combinations.