The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 09, 2011
Filed:
Jan. 31, 2008
Wei-yi Xiao, Poughkeepsie, NY (US);
Dean G. Bair, Bloomington, NY (US);
Christopher A. Krygowski, LaGrangeville, NY (US);
Chung-lung K. Shum, Wappingers Falls, NY (US);
Wei-Yi Xiao, Poughkeepsie, NY (US);
Dean G. Bair, Bloomington, NY (US);
Christopher A. Krygowski, LaGrangeville, NY (US);
Chung-Lung K. Shum, Wappingers Falls, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method, system, and computer program product are provided for verifying out of order instruction address (IA) stride prefetch performance in a processor design having more than one level of cache hierarchies. Multiple instruction streams are generated and the instructions loop back to corresponding instruction addresses. The multiple instruction streams are dispatched to a processor and simulation application to process. When a particular instruction is being dispatched, the particular instruction's instruction address and operand address are recorded in the queue. The processor is monitored to determine if the processor executes fetch and prefetch commands in accordance with the simulation application. It is checked to determine if prefetch commands are issued for instructions having three or more strides.