The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2011

Filed:

Nov. 14, 2007
Applicants:

Chul Ho Kim, Yongin-Si, KR;

Kook Chul Moon, Yongin-Si, KR;

Jae Hyun Kim, Suwon-Si, KR;

Ho Suk Maeng, Seoul, KR;

Sang Hoon Lee, Seoul, KR;

Kyung Hoon Kim, Uiwang-Si, KR;

Keun Woo Park, Seoul, KR;

Inventors:

Chul Ho Kim, Yongin-Si, KR;

Kook Chul Moon, Yongin-Si, KR;

Jae Hyun Kim, Suwon-Si, KR;

Ho Suk Maeng, Seoul, KR;

Sang Hoon Lee, Seoul, KR;

Kyung Hoon Kim, Uiwang-Si, KR;

Keun Woo Park, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1335 (2006.01); G02F 1/136 (2006.01);
U.S. Cl.
CPC ...
Abstract

A thin film transistor (TFT) substrate that is capable of providing a wide viewing angle and high contrast ratio without a decrease is aperture ratio is presented. The TFT substrate may be, for example, used with a patterned vertical alignment (PVA) mode LCD. The TFT substrate includes gate lines and data lines extending in non-parallel directions and a pixel electrode formed in a pixel region. The pixel region has two transmission regions separated from each other by a reflection region, and at least one of the gate lines is formed in the reflection region. A storage capacitor may also be formed in the reflection region. This configuration avoids the use of a bridge region between the two transmission regions that is responsible for aperture ratio decrease in the conventional configuration.


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