The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 09, 2011
Filed:
Jan. 20, 2010
Kazuo Otsuga, Kokubunji, JP;
Kenichi Osada, Tokyo, JP;
Makoto Saen, Kodaira, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
The performance of a whole system is improved by synchronizing communication and computations between stacked computing LSIs. Each of stacked an external communication LSI and a computing LSI has a PLL which multiplies a crystal oscillator clock signal, a clock pulse generator which distributes the clock signal, and flip-flop circuits. The computing LSI has a DLL circuit composed of a clock phase comparator, a delay controller, and a delay chain. In order to synchronize the communication and computations of the external communication LSI and the computing LSI, a synchronization reference clock signal is transmitted from the external communication LSI to the computing LSI via a through-electrode. An internal clock signal of the computing LSI is synchronized with the synchronization reference clock signal from the external communication LSI by the DLL circuit.