System and method for reducing power consumption of memory in an i/o controller

Abstract

A memory system for an I/O controller which includes a memory with multiple memory blocks, a supply voltage control circuit providing power to each memory block, and control logic. Each memory block retains stored information with reduced power consumption when receiving a reduced voltage level. The control logic allocates buffers in the memory and controls the supply voltage control circuit to provide the full voltage level to at least one memory block of at least one allocated buffer and to provide the reduced voltage level to remaining memory blocks. Each memory block includes one or more buffers. In various embodiments the control logic fully powers each memory block of a buffer or less than all of the memory blocks. A linked buffer structure may be used to reduce the memory blocks of an allocated buffer receiving full power, such as only one memory block in the buffer.