The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 02, 2011
Filed:
Jul. 10, 2006
Freerk Van Rijs, Nijmegen, NL;
Stephan J. C. H. Theeuwen, Nijmegen, NL;
Petra C. A. Hammes, Ede, NL;
Freerk Van Rijs, Nijmegen, NL;
Stephan J. C. H. Theeuwen, Nijmegen, NL;
Petra C. A. Hammes, Ede, NL;
NXP B.V., Eindhoven, NL;
Abstract
The LDMOS transistor () of the invention comprises a source region (), a channel region (), a drain extension region () and a gate electrode (). The LDMOS transistor () further comprises a first gate oxide layer () and a second gate oxide layer (), which is thicker than the first gate oxide layer (). The first gate oxide layer () at least extends over a first portion of the channel region (), which is adjacent to the source region (). The second gate oxide layer () extends over a region where a local maximum (A, B) of the electric field (E) generates hot carriers thereby reducing the impact of the hot carriers and reducing the Idq-degradation. In another embodiment the second gate oxide layer () extends over a second portion of the channel region (), which mutually connects the drain extension region () and the first portion of the channel region (), thereby improving the linear efficiency of the LDMOS transistor ().