The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2011

Filed:

Feb. 12, 2004
Applicants:

Rob Van Dalen, Eindhoven, NL;

Prabhat Agarwal, Leuven, BE;

Jan Willem Slotboom, Eindhoven, NL;

Gerrit Elbert Johannes Koops, Leuven, BE;

Inventors:

Rob Van Dalen, Eindhoven, NL;

Prabhat Agarwal, Leuven, BE;

Jan Willem Slotboom, Eindhoven, NL;

Gerrit Elbert Johannes Koops, Leuven, BE;

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/732 (2006.01); H01L 29/737 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention relates to a semiconductor device with a substrate () and a semiconductor body () with a heterojunction bipolar, in particular npn, transistor with an emitter region (), a base region () and a collector region (), which are provided with, respectively, a first, a second and a third connection conductor (), and wherein the bandgap of the base region () is smaller than that of the collector region () or of the emitter region (), for example by the use of a silicon-germanium mixed crystal instead of pure silicon in the base region (). Such a device is characterized by a very high speed, but its transistor shows a relatively low BVeeo. In a device () according to the invention the doping flux of the emitter region () is locally reduced by a further semiconductor region () of the second conductivity type which is embedded in the emitter region (). In this way, on the one hand, a low-impedance emitter contact is ensured, while locally the Gummel number is increased without the drawbacks normally associated with such an increase. In this way, the hole current in the, npn, transistor is increased and thus the gain is decreased. The relatively high gain of a Si—Ge transistor is responsible for the low BVCeOf which is consequently avoided in a device () according to the invention. Preferably the further semiconductor region () is recessed in the emitter region (1) and said emitter region () preferably comprises a lower doped part that borders on the base region () and that is situated below the further semiconductor region (). The invention also comprises a method of manufacturing a semiconductor device () according to the invention.


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