The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 26, 2011

Filed:

Jul. 23, 2007
Applicants:

Richard Win Thaik, San Jose, CA (US);

John Gregory Favor, Scotts Valley, CA (US);

Joseph Byron Rowlands, Santa Clara, CA (US);

Leonard Eric Shar, Menlo Park, CA (US);

Inventors:

Richard Win Thaik, San Jose, CA (US);

John Gregory Favor, Scotts Valley, CA (US);

Joseph Byron Rowlands, Santa Clara, CA (US);

Leonard Eric Shar, Menlo Park, CA (US);

Assignee:

Oracle America, Inc., Redwood City, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2006.01);
U.S. Cl.
CPC ...
Abstract

An instruction processing circuit for a processor, where the instruction processing circuit is adapted to provide one or more sequence of operations, based on one or more sequence of instructions, to an execution circuit of the processor. The instruction processing circuit includes a cache circuit operable to store a second type of sequence of operations that represents at least a portion of a first type of sequence of operations, where the sequence of operations of the second type includes at most one control transfer that, when present, ends a first portion of a sequence of instructions, where the cache circuit is further configured to store a third type of sequence of operations that represents a set of at least two sequences of operations.


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