The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 26, 2011

Filed:

Sep. 03, 2008
Applicant:

Yoshiharu Kaneda, Ohtsu, JP;

Inventor:

Yoshiharu Kaneda, Ohtsu, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/56 (2006.01); H01L 23/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided is a method of manufacturing a semiconductor device including: arranging multiple dies planarly between a first lead frame plate and a second lead frame plate, which face each other, to connect the multiple semiconductor chips to each of the first lead frame plate and the second lead frame plate; filling a resin between the first lead frame plate and the second lead frame plate to seal the multiple dies; performing a first dicing on a laminated body including the first lead frame plate, the resin, and the second lead frame plate, between the adjacent dies, to separate at least the first lead frame plate by cutting; applying plating to the laminated body with at least the first lead frame plate being separated by cutting; and performing a second dicing on a remainder of the laminated body between the adjacent dies, to separate the laminated body into individual semiconductor devices.


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