The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 19, 2011
Filed:
Feb. 27, 2009
Sankaranarayanan Srinivasan, San Jose, CA (US);
Sankaranarayanan Srinivasan, San Jose, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
Approaches for merging replicate logic blocks of a circuit design. Groups of replicate logic blocks in a placed circuit design are determined. For the replicate logic blocks in each group, a determination is made whether or not to merge replicate logic blocks in a subset of the replicate logic blocks into a respective single replacement logic block for the subset. In response to determining to merge the replicate logic blocks in the subset, the replicate logic blocks in the subset are replaced in the circuit design with the respective replacement logic block. The circuit design having the replacement logic block is stored in a memory by a processor executing the process.