The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 19, 2011
Filed:
Apr. 10, 2008
Shawn Searles, Austin, TX (US);
Grace Chuang, Austin, TX (US);
Christopher M. Kurker, Austin, TX (US);
Curtis M. Brody, Austin, TX (US);
Shawn Searles, Austin, TX (US);
Grace Chuang, Austin, TX (US);
Christopher M. Kurker, Austin, TX (US);
Curtis M. Brody, Austin, TX (US);
GLOBALFOUNDRIES, Inc., Grand Cayman, KY;
Abstract
Receiver architectures and bias circuits for a data processor are provided. A receiver architecture includes a linear receiver having a first input node for a data (DQ) signal, a second input node for a reference voltage, and output nodes for a differential output signal. The linear receiver compares the DQ signal to the reference voltage, and generates the differential output signal in response to the comparison. A sense amplifier is coupled to the linear receiver. The sense amplifier has input nodes connected to the output nodes of the linear receiver, and an output node for a binary output signal having voltage characteristics compatible with the processor. The sense amplifier transforms the differential output signal into the binary output signal. The receiver architecture also includes a programming architecture coupled to the linear receiver to set operating characteristics of the linear receiver.