The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 19, 2011
Filed:
Dec. 20, 2007
Soundararajan Srinivasa Prasad, Bangalore, IN;
Damaraju Naga Radha Krishna, La Jolla, CA (US);
Soundararajan Srinivasa Prasad, Bangalore, IN;
Damaraju Naga Radha Krishna, La Jolla, CA (US);
Cypress Semiconductor Corporation, San Jose, CA (US);
Abstract
Disclosed are a circuit and a method for adaptively biasing a voltage regulator with minimal output overshoot. The circuit includes an adaptive bias current mirror circuit further including a first transistor and a second transistor, the first transistor and the second transistor having source nodes coupled to a drain node of the first transistor. The circuit includes a common node coupled to the source node of the first transistor and the source node of the second transistor, wherein a source degenerate resistor is coupled to the adaptive bias current mirror circuit and is coupled to the common node and wherein the source degenerate resistor is configured to limit an output peak current of the voltage regulator circuit.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile