The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 19, 2011

Filed:

Jul. 13, 2009
Applicants:

Vikram Gupta, Fremont, CA (US);

Ed Lambert, Pleasanton, CA (US);

Inventors:

Vikram Gupta, Fremont, CA (US);

Ed Lambert, Pleasanton, CA (US);

Assignee:

Broadcom Corporation, Irvine, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit containing multiple modules coupled to a pad via a multiplexer. The modules are selectively coupled to the pad by the multiplexer to provide integrated circuit function flexibility with a limited number of pads. A multiplexer select signal determines which module or clock circuit is coupled by the multiplexer. A common buffer may be coupled between the multiplexer and the pad to save substrate space. An analog circuit may be coupled to the pad to provide a signal path minimizing signal distortion. The integrated circuit's clock may be coupled via the multiplexer to an off-substrate circuit. Selective module coupling improves the integrated circuit's testing speed, may salvage an integrated circuit containing a malfunctioning module, and provides for signal loopback during testing.


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