The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 19, 2011
Filed:
Mar. 14, 2007
Tarek Kaylani, Irvine, CA (US);
Zhihui Wang, Irvine, CA (US);
Kenneth Kindsfater, Laguna Niguel, CA (US);
Balasubramanian Annamalai, Karnataka, IN;
Jeff Echtenkamp, Laguna Niguel, CA (US);
Tarek Kaylani, Irvine, CA (US);
Zhihui Wang, Irvine, CA (US);
Kenneth Kindsfater, Laguna Niguel, CA (US);
Balasubramanian Annamalai, Karnataka, IN;
Jeff Echtenkamp, Laguna Niguel, CA (US);
Broadcom Corporation, Irvine, CA (US);
Abstract
According to one exemplary embodiment, a semiconductor die with on-die preferred interface selection includes at least two groups of pads situated on an active surface of the semiconductor die, where each of the at least two groups of pads is coupled to its associated interface in the die. A set of bumps is mask-programmably routed to one of the at least two groups of pads, thereby selecting the preferred interface for the semiconductor die. A non-preferred interface is not routed to any bumps on the active surface of the semiconductor die, thereby reducing bump count on the die. Each of the at least two groups of pads can be situated in a corresponding pad ring on the active surface of said semiconductor die. The at least two groups of pads can be laid out substantially inline.