The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2011

Filed:

Mar. 08, 2006
Applicants:

Richard Y. Chen, Croton-on-Hudson, NY (US);

Takashi Sato, Cupertino, CA (US);

Javier Del Prado Pavon, Mougins, ES;

Inventors:

Richard Y. Chen, Croton-on-Hudson, NY (US);

Takashi Sato, Cupertino, CA (US);

Javier Del Prado Pavon, Mougins, ES;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04W 4/00 (2009.01);
U.S. Cl.
CPC ...
Abstract

In order that media access slots MAS are allocated based on minimum latency requirements of, for example, not less than 4 ms, or on a medium utilization efficiency or power consumption requirement for a minimum reservation block length, both high-efficiency and low-latency schemes (or category) need to coexist within a superframe with fair support given to both. The maximization of contiguous available MAS between low-latency and high-efficiency schemes ensures that power saving and overhead risk are minimized without compromising the support for low-latency applications.


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