The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 05, 2011
Filed:
Apr. 30, 2009
Clive D. Bittlestone, Allen, TX (US);
Kit Wing S. Lee, McKinney, TX (US);
Ekanayake A. Amerasekera, Dallas, TX (US);
Anuj Batra, Dallas, TX (US);
Srinivas Lingam, Dallas, TX (US);
Clive D. Bittlestone, Allen, TX (US);
Kit Wing S. Lee, McKinney, TX (US);
Ekanayake A. Amerasekera, Dallas, TX (US);
Anuj Batra, Dallas, TX (US);
Srinivas Lingam, Dallas, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
An integrated circuit (IC) includes at least one programmable digital logic cell that includes first dedicated digital logic cell having a plurality of transistors including at least one PMOS transistor and at least one NMOS transistor configured to perform at least one digital logical function. The first dedicated digital logic cell includes a plurality of nodes including at least one input node and at least one output node that reflects performance of a digital logical function. Programmable tuning circuitry includes at least one tuning input and at least one tuning circuit output. Circuitry for coupling or decoupling the tuning input or tuning circuit output to at least one of the plurality of nodes of the first dedicated digital logical cell is provided, wherein the coupling or decoupling is operable to change the processing speed for the first reprogrammable digital logic cell.