The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2011

Filed:

Jun. 05, 2008
Applicants:

Michihiro Kawashita, Hitachinaka, JP;

Yasuhiro Yoshimura, Kasumigaura, JP;

Naotaka Tanaka, Kasumigaura, JP;

Takahiro Naito, Kokubunji, JP;

Takashi Akazawa, Musashimurayama, JP;

Inventors:

Michihiro Kawashita, Hitachinaka, JP;

Yasuhiro Yoshimura, Kasumigaura, JP;

Naotaka Tanaka, Kasumigaura, JP;

Takahiro Naito, Kokubunji, JP;

Takashi Akazawa, Musashimurayama, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/41 (2006.01);
U.S. Cl.
CPC ...
Abstract

A through silicon via reaching a pad from a second surface of a semiconductor substrate is formed. A penetration space in the through silicon via is formed of a first hole and a second hole with a diameter smaller than that of the first hole. The first hole is formed from the second surface of the semiconductor substrate to the middle of the interlayer insulating film. Further, the second hole reaching the pad from the bottom of the first hole is formed. Then, the interlayer insulating film formed on the first surface of the semiconductor substrate has a step shape reflecting a step difference between the bottom surface of the first hole and the first surface of the semiconductor substrate. More specifically, the thickness of the interlayer insulating film between the bottom surface of the first hole and the pad is smaller than that in other portions.


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