Information processing apparatus and access control method

Abstract

According to one embodiment, an information processing apparatus includes a processor including a register file which holds physical registers to which general purpose registers provided by an instruction set architecture are assigned, a virtual register assigning unit which assigns a virtual address in the main memory space to a physical register in the register file based on a request from a program, and records a correspondence between each of the virtual addresses and a corresponding one of the physical registers in a virtual register conversion table, and an access converting unit which determines whether or not a virtual address to be accessed is recorded in the virtual register conversion table managed by the virtual register assigning unit, and executes, when the virtual address is recorded therein, processing of accessing the physical register of which a correspondence to the virtual address is recorded in the virtual register conversion table.