The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 28, 2011
Filed:
Apr. 25, 2008
Derrick Sai-tang Butt, San Leandro, CA (US);
Cheng-gang Kong, Saratoga, CA (US);
Terence J. Magee, San Francisco, CA (US);
Thomas Hughes, San Francisco, CA (US);
Derrick Sai-Tang Butt, San Leandro, CA (US);
Cheng-Gang Kong, Saratoga, CA (US);
Terence J. Magee, San Francisco, CA (US);
Thomas Hughes, San Francisco, CA (US);
LSI Corporation, Milpitas, CA (US);
Abstract
A memory interface physical layer macro including one or more embedded input/output (I/O) buffers, one or more memory interface hardmacros and control logic. The one or more embedded input/output (I/O) buffers support a plurality of I/O supply voltage levels. The one or more memory interface hardmacros are coupled to the one or more embedded I/O buffers. The control logic controls the one or more hardmacros and the one or more I/O buffers.